220-1101 exam dumps

220-1101 practice question 81 of 471

A+ Core 1. Associate level, CompTIA. Free question with the correct answer and a full explanation.

220-1101 Question 81

Single answerWidths

A technician is upgrading memory in an older desktop that has four DDR3 DIMM slots. The motherboard manual states: "Supports dual-channel DDR3 memory with a maximum bus width of 64 bits per channel." The user asks why installing matched DIMMs in the correct slots improves performance. Which statement BEST explains the benefit related to memory width?

  1. A

    Using matched DIMMs in dual-channel mode increases the effective data path from 64 bits to 128 bits across the two channels.

  2. B

    Using matched DIMMs changes each DDR3 module from 64-bit to 32-bit mode, reducing latency.

  3. C

    Using matched DIMMs increases the memory clock speed automatically, even if the motherboard does not support higher speeds.

  4. D

    Using matched DIMMs converts non-ECC memory into ECC memory, improving bandwidth and reliability.

Show answer and explanation

Correct answer: A

Explanation

The question focuses on memory width in a practical upgrade scenario. In A+ Core 1, candidates should understand that a typical non-ECC desktop DIMM has a 64-bit data width per channel, while ECC DIMMs commonly add extra bits for error checking, often totaling 72 bits physically. However, dual-channel performance comes from using two memory channels simultaneously, effectively doubling the available data path from 64 bits to 128 bits. This increases theoretical bandwidth, which is why technicians follow motherboard documentation for installing matched DIMMs in the correct slots. Best practice is to consult the system board manual for supported memory population rules, channel configuration, and DIMM compatibility.

  • A. Correct.

    Correct. A standard desktop DDR3 DIMM presents a 64-bit data width per channel. When the motherboard supports dual-channel memory and matched modules are installed in the proper paired slots, the system can access two 64-bit channels in parallel for an effective 128-bit-wide data path. This is the key width-related performance benefit.

  • B. Incorrect.

    Incorrect. Standard desktop DDR3 DIMMs do not switch from 64-bit to 32-bit operation in dual-channel mode. The misconception is confusing narrower internal operations or bus terminology with the external memory channel width seen by the memory controller.

  • C. Incorrect.

    Incorrect. Dual-channel operation affects memory bandwidth by widening the effective path, not by forcing the RAM to run at a higher clock rate. Actual memory speed is limited by the motherboard, CPU memory controller, BIOS/UEFI settings, and installed DIMM specifications.

  • D. Incorrect.

    Incorrect. ECC capability depends on both the memory modules and the motherboard/CPU memory controller supporting ECC. Installing matched DIMMs does not convert non-ECC RAM into ECC RAM. This option mixes reliability features with bandwidth concepts.

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